\ bootblink.fs  --- special 120 bootloader to blink LED on P1.6

0 [if]
Copyright (C) 2006 by Charles Shattuck.

This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.

This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
Lesser General Public License for more details.

You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

For LGPL information:   http://www.gnu.org/copyleft/lesser.txt

[then]
] \ target compiler

0 org
0 there $ab erase
$03 org $403 again
$0b org $40b again
$13 org $413 again
$1b org $41b again
$23 org $423 again
$2b org $42b again
$33 org $433 again
$3b org $43b again
$43 org $443 again
$4b org $44b again
$53 org $453 again
$5b org $45b again
$63 org $463 again
$6b org $46b again
$73 org $473 again
$7b org $47b again
$83 org $483 again
$8b org $48b again
$93 org $493 again
$9b org $49b again
$a3 org $4a3 again
$ab org  \ Code starts here, after interrupts.

\ Entry point of main program when not bootloading.
HERE ( *) $400 org : main ( *) org

\ test LED attached to P1.6 on SIP
:m -led  [ 6 .P1 clr ] m;
:m +led  [ 6 .P1 set ] m;
:m ~led  [ 6 .P1 toggle ] m;

\ debug
1 [if]
:m delay1 
      7 #for
         0 # 6 #for
            0 # 5 #for  5 #next
         6 #next
      7 #next m;

:m blink	begin  $1C # delay1  ~led  again m;     

[then]

: 'EMIT begin 1 .SCON until. 1 .SCON clr SBUF (#!) ;
: 'KEY  begin 0 .SCON until. 0 .SCON clr SBUF (#@) ;
: 'KEY-OR-TIMEOUT 
	$f1 # TMOD and! $01 # TMOD ior! \ 16 bit timer 0.
	0 # TH0 #! 0 # TL0 #! \ Timeout period.
	5 .TCON clr 4 .TCON set \ Start timer0.
	4 # 7 #!
	begin
		0 .SCON if.  0 .SCON clr SBUF (#@) ;  then
		5 .TCON if. \ Timer0 overflow.
			[ 7 dec ] 7 (#@) 0=if
				4 .TCON clr \ Stop timer0.
				main ; \ Run normal program.
			then	5 .TCON clr
		then
	again
: ENTRY
	$de # WDTCN #! $ad # WDTCN #! \ Disable watchdog.
\ Initialization, before main.
\	SFR-f
\	$04 # XBR0 #! \ Enable UART only.
\	$40 # XBR2 #! \ Enable crossbar and weak pullups. 
\ *** SET TO SFR PAGE F ***
	SFR-f
\ --- XBAR0
	$0f # XBR0 #!     \ i2c, SPI, UART0, CEX0
		\ SMB0EN(0)   SDA & SDL routed to port pins (not needed)
		\ SPI0EN(1)   SPI routed to port pins
		\ UART0EN(2)  TX to P0.0, RX to P0.1
		\ PCA0ME(5-3) 001 routes CEX0 to port pin
\ --- XBAR1
	$84 # XBR1 #!      \ /SYSCLK
\ --- XBAR2
\	$44 # XBR2 #!      \ UART1, Weak Pullups, XBR enabled.
	$40 # XBR2 #!      \ Weak Pullups, XBR enabled.
\ --- port 0
	$14 # P0MDOUT #!   \ Push/Pull SCLK,MOSI
\ --- port 1
	$fd # P1MDOUT #!   \ Push/Pull /SYSCLK
\ --- port 2 (discrete I/O)
 	$0F # P2MDOUT ior! \ P2.0 to P2.3 as output
	$c3 # OSCICN #!    \ Internal 24.5MHz oscillator.
\ Speed up.
	4 ~# PLL0CN and!   \ Reference clock is internal.
	SFR-0
	$b0 # FLSCL ior!   \ Flash timing.
	SFR-f
	$01 # PLL0CN ior!  \ PLL power on.
	$01 # PLL0DIV #!
	$01 # PLL0FLT #!   \ Filter for 100MHz.
	$04 # PLL0MUL #!   \ Multiply internal clock by 4.
	0 # 7 #for 7 #next \ Delay at least 5us.
	2 # PLL0CN ior!    \ Enable the PLL.
	begin PLL0CN (#@) $10 # and 0=until
	$02 # CLKSEL #!    \ Now we're running at 98MHz.  
	blink 		   \ blink the test LED
	main ;
HERE ( *) 0 org : reset ENTRY ; ( *) org


0 [if]  --------------------------[ Notes ]------------------------------------
 1. Blinks the LED on P1.6
 2. Parentheses indicate the bit number.  Example -- PWMn(1) says PWMn is bit 1. 
[then]

0 [if]  ---------------------[ Revision History ]------------------------------
  22Apr07 rjn
	+ cloned from bootloader120.fs, ten-io.fs and bootloader410.fs
        + blink works.
[then]
