\ bootloader120.fs

0 [if]
Copyright (C) 2006 by Charles Shattuck.

This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.

This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
Lesser General Public License for more details.

You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

For LGPL information:   http://www.gnu.org/copyleft/lesser.txt

[then]
] \ target compiler

0 org
0 there $ab erase
$03 org $403 again
$0b org $40b again
$13 org $413 again
$1b org $41b again
$23 org $423 again
$2b org $42b again
$33 org $433 again
$3b org $43b again
$43 org $443 again
$4b org $44b again
$53 org $453 again
$5b org $45b again
$63 org $463 again
$6b org $46b again
$73 org $473 again
$7b org $47b again
$83 org $483 again
$8b org $48b again
$93 org $493 again
$9b org $49b again
$a3 org $4a3 again
$ab org  \ Code starts here, after interrupts.

\ Entry point of main program when not bootloading.
HERE ( *) $400 org : main ( *) org

: 'EMIT begin 1 .SCON until. 1 .SCON clr SBUF (#!) ;
: 'KEY  begin 0 .SCON until. 0 .SCON clr SBUF (#@) ;
: 'KEY-OR-TIMEOUT 
	$f1 # TMOD and! $01 # TMOD ior! \ 16 bit timer 0.
	0 # TH0 #! 0 # TL0 #! \ Timeout period.
	5 .TCON clr 4 .TCON set \ Start timer0.
	4 # 7 #!
	begin
		0 .SCON if.  0 .SCON clr SBUF (#@) ;  then
		5 .TCON if. \ Timer0 overflow.
			[ 7 dec ] 7 (#@) 0=if
				4 .TCON clr \ Stop timer0.
				main ; \ Run normal program.
			then	5 .TCON clr
		then
	again
: ENTRY
	$de # WDTCN #! $ad # WDTCN #! \ Disable watchdog.
\ Initialization, before main.
	SFR-f
	$04 # XBR0 #! \ Enable UART only.
	$40 # XBR2 #! \ Enable crossbar and weak pullups.
	$c3 # OSCICN #! \ Internal 24.5MHz oscillator.
\ Speed up.
	4 ~# PLL0CN and! \ Reference clock is internal.
	SFR-0
	$b0 # FLSCL ior! \ Flash timing.
	SFR-f
	$01 # PLL0CN ior! \ PLL power on.
	$01 # PLL0DIV #!
	$01 # PLL0FLT #! \ Filter for 100MHz.
	$04 # PLL0MUL #! \ Multiply internal clock by 4.
	0 # 7 #for 7 #next \ Delay at least 5us.
	2 # PLL0CN ior! \ Enable the PLL.
	begin PLL0CN (#@) $10 # and 0=until
	$02 # CLKSEL #! \ Now we're running at 98MHz.
\ Setup serial port.
	SFR-0 \ For rest of program.
	$10 # CKCON #! \ T1 uses SYSCLK, no prescaler.
	$52 # SCON #!
	$20 # TMOD #!
	97 # TH1 #! \ 9600 baud, 24.5MHz; 38400 baud, 98MHz. 
	$10 # SSTA0 #! \ SMOD0=1
	6 .TCON set
\ Setup any registers to known values
        $00 # EMIOCN #! \ make sure 8 bit movx instruction are to page 0
        $03 # EMIOCF #! \ make sure 16 bit movx instruction use xram
        $ff # EMIOTC #! \ use slowest access for ext ram devices
\ Only bootload if the password comes in time.
	'KEY-OR-TIMEOUT
	$a5 # xor if 64 (#) main ; then
	$5a (#) 'EMIT \ Signal host we're ready.
	'KEY-OR-TIMEOUT
	char a # xor if 64 (#) main ; then
	'KEY-OR-TIMEOUT
	char m # xor if 64 (#) main ; then
	'KEY-OR-TIMEOUT
	char r # xor if 85 (#) main ; then
\ Setup the download.
	$a5 (#) 'EMIT \ Signal readiness to host.
	'KEY \ Get number of pages.
	0=if main ; then \ Don't download 0 pages.
	64 # =if then 0=if' 62 (#) then \ Clip.
	7 (#!) \ Save number of pages in R7.
	1+ clrc \ Divide by 2 and round up,
	2/' 7 xch \ The 120 erases in 1024 byte chunks.
\ Erase pages.
	$01 # FLSCL ior! \ Enables writes via user software.
	$03 # PSCTL #! \ Enable writing and erasing.
	$400 ##p! \ First page to erase.
	begin (!x) DPH inc DPH inc DPH inc DPH inc
	7 #next
	7 (#!) \ Restore page counter.
	$5a (#) 'EMIT \ Signal readiness to host.
\ Accept bytes and write them into flash.
\ Start at $200 for compatibility with other Silicon Labs chips.
\ The program downloaded must have its entry point at $400 though!
	1 # PSCTL #! \ Disable erasing, leave writing enabled.
	$200 ##p! \ For compatibility.
	begin
		0 # 6 #for
			'KEY (!x) p+
			'KEY (!x) p+
		6 #next
		7 (#@) 'EMIT
	7 #next
	0 # PSCTL #! \ Disable further writing to flash.
	1 ~# FLSCL and! \ Disable further writes to flash.
	'KEY \ Wait for signal to start running program.
	main ;
HERE ( *) 0 org : reset ENTRY ; ( *) org

